Implement all the chips described in ECS chapter 3. The only building blocks that you can use are primitive DFF gates, chips that you will build on top of them, and chips described in previous chapters.
Read ECS chapter 3.
Read Appendix A.6 and A.7.
Read the Hardware Simulator Tutorial parts IV and V.
Within your src directory, create a subdir named project03. Extract the contents of project03.zip into it.
Your file structure should now look like:
Add, commit and push the new files.
Again, be sure to commit often. I usually commit one time per each .hdl once I know it's passing my tests. Push any time you want to show your work (I recommend pushing every other day to show me what you've done).
Boilerplate .hdl files have been provided for you as usual. Follow the usual workflow.
|
Chip (HDL) |
Function |
Test script |
Compare file |
| DFF | Data Flip-Flop (primitive) | ||
| Bit | 1-bit binary cell | Bit.tst | Bit.cmp |
| Register | 16-bit Register | Register.tst |
Register.cmp |
| RAM8 | 16-bit / 8-register memory | RAM8.tst |
RAM8.cmp |
| RAM64 | 16-bit / 64-register memory | RAM64.tst |
RAM64.cmp |
| RAM512 | 16-bit / 512-register memory | RAM512.tst |
RAM512.cmp |
| RAM4K | 16-bit / 4096-register memory | RAM4K.tst |
RAM4K.cmp |
| RAM16K | 16-bit / 16384-register memory | RAM16K.tst |
RAM16K.cmp |
| PC | 16-bit Program Counter | PC.tst |
PC.cmp |
The Data Flip-Flop (DFF) gate is considered primitive and thus there is no need to build it: when the simulator encounters a DFF gate in an HDL program, it automatically invokes the built-in tools/builtInChips/DFF.hdl implementation.
Note the subdirectories of this project. When constructing RAM chips from smaller RAM chips, it is recommend that you use built-in versions of the latter. Otherwise, the simulator may run very slowly or even out of (real) memory space, since large RAM chips contain tens of thousands of lower level chips, and all these chips are kept in memory (as software objects) by the simulator. For this reason, the RAM512.hdl, RAM4K.hdl, and RAM16K.hdl programs are in a separate directory. This way, the recursive descent construction of the RAM4K and RAM16K chips stops with the RAM512 chip, while the lower-level chips from which the RAM512 is made are treated as built-in (since the simulator does not find them in this directory). In other words, leave the directory structure alone when working on the chips.
I must be able to pull your repo at 5PM on Friday, February 12 and I should see your project03 files.
Your repository must show a history of work. You should be committing every time you complete a chip. A repository log showing one commit with a message like "project03 done" is not acceptable.